Electrically insulative materials (in other words, dielectric materials) are widely used in semiconductor fabrication to electrically isolate various electrical components from one another. Devices that extend into a semiconductor substrate may be electrically isolated by trenched isolation regions formed within the substrate between the components. In such technique, trenches are etched into a semiconductor substrate (such as a silicon substrate); and the trenches are subsequently filled with dielectric material (such as silicon dioxide).
Various methods have been developed for depositing dielectric materials across semiconductor substrates. Such methods include chemical vapor deposition (CVD) processes and atomic layer deposition (ALD) processes. ALD processes are generally processes in which precursor materials react at a surface, rather than in a vapor phase above the surface. In contrast, CVD processes are generally processes in which precursor materials react in a vapor phase above the surface to form the deposit that ultimately accumulates on the surface. ALD processes will generally be characterized by successive, controlled formation of monolayers across a substrate surface, with the monolayers building up to form the desired deposit to a desired thickness. CVD process will not comprise controlled formation of monolayers, and instead will form a thick bulk deposit across a substrate surface in a single deposition step.
An advantage of CVD is that it is relatively rapid, and accordingly may be utilized to achieve high throughput of wafers through a fabrication process. A disadvantage of CVD is that it tends to lead to relatively poor uniformity of deposition across a substrate. In contrast, an advantage of ALD is that it may accomplish relatively good uniformity of deposition across a substrate, and a disadvantage of some ALD processes is that they tend to be slow and accordingly associated with low throughput of wafers through a fabrication process. It is desired to develop processes having the good uniformity associated with ALD, while also allowing relatively high throughput of wafers through a fabrication process.